A multilayer wiring structure of a semiconductor device is formed by embedding a metal wiring in an interlayer insulation film. As a material of the metal wiring, copper (Cu) is used because of a small electro-migration and a low resistance. A damascene step is generally employed as a process for forming the multilayer wiring structure. As an interlayer insulation film, there are used films made of a silicon compound containing, e.g., silicon (Si) and oxygen (O) or carbon (C), as a low dielectric material, such as a SiO film, a SiOF film, a SiC film, a SiOC film, a SiCOH film, a SiCN film, a porous silica film, a porous methylsilsesquioxane film, a poly-arylene film, and a SILK (registered trademark) film, or a fluorocarbon film.
In this damascene step, an interlayer insulation film is firstly etched by plasma made of a process gas containing a CF-series gas and an oxygen gas, so that there is formed a recess which includes a trench in which a wiring to be disposed in a layer is embedded, and a via hole in which a connection wiring for connecting an upper wiring and a lower wiring is embedded. Thereafter, there is performed an ashing process using a plasma of oxygen gas, for example. Thus, a photoresist mask made of e.g., an organic matter, which has been used as a mask in the etching process, is removed. Then, since residues as byproducts generated by these plasma processes adhere to a side surface and a rear surface of a substrate, there is performed a wet cleaning process in which the substrate is immersed in, e.g., a HF solution (hydrofluoric acid) so as to remove the residues. After that, Cu is embedded in the recess by a CVD method or an electrolytic plating method.
When the CVD method is used, in order to suitably embed copper, it is preferable to form a very thin copper seed layer along a surface of the interlayer insulation film and an inner surface of the recess. On the other hand, when the electrolytic plating method is used, it is necessary to form a copper seed layer serving as an electrode on the surface of the interlayer insulation film and the recess. In addition, since copper is likely to diffuse in the interlayer insulation film, it is necessary to form a barrier film in the recess in order to prevent the copper diffusion.
Thus, there has been generally formed a barrier film made of, e.g., Ta/TaN and a copper seed layer by a sputtering method. However, as a wiring density is increased and an opening diameter of the recess is decreased, such a sputtering method provides a poor step coverage for the recess, so that films are resistant to adhere to a sidewall of the recess. In addition, since the sputtering process is performed twice (for Ta and TaN), the thickness of the film is increased. Thus, it is difficult to cope with the miniaturization of the wiring density. JP2005-277390A (especially paragraphs 0018 to 0020) describes a technique in which manganese (Mn) is deposited in a recess by the sputtering method, then copper is deposited, and thereafter the substrate is subjected to an annealing process, so that a self-forming barrier layer made of manganese oxide (MnOx (x: given positive number) and a copper wiring layer are formed. Surplus manganese remaining in the metal wiring diffuses to a layer above the metal wiring by the annealing process, and is removed by a subsequent CMP (Chemical Mechanical Polishing) step. In the above method, the manganese and, for example, oxygen contained in the interlayer insulation film react with each other by the annealing process, so that manganese oxide is generated. Since the manganese oxide is formed as a barrier film on an interface between the interlayer insulation film and the metal wiring, a very thin barrier film can be obtained.
However, as described above, in the sputtering method, a larger amount of manganese is deposited on the bottom surface of the recess, as compared with the sidewall thereof. Thus, there is a possibility that a sufficient amount of manganese might not adhere to the sidewall of the recess, whereby a required barrier function cannot be obtained. In addition, when a large amount of manganese remains on the bottom surface of the recess, it is difficult to remove the manganese even by the aforementioned annealing process. Since an electric resistance of manganese is larger than that of copper, the manganese remaining in the metal wiring results in increase of a wring resistance.
In addition, since an oxygen gas is used as a process gas in the above plasma process, the surface of the metal wiring exposed to the bottom surface of the recess is oxidized by the plasma of the oxygen gas. Moreover, since the wet cleaning following thereto is performed in an atmosphere, a natural oxide film is further formed on the surface of the metal wiring. When the above-described self-forming barrier film is formed on the substrate, the oxygen in the oxide film and the manganese react with each other to generate manganese oxide. The manganese oxide is an insulator which invites increase of the wiring resistance. Further, since the manganese oxide is in a passive state that is poor in reactivity, an additional step, such as a punch-through step, is required for removing the manganese oxide.
Although the above-described JP2005-277390A, JP2007-67107A (especially FIG. 3-1, and paragraphs 0028, 0029, and 0037), and JP11-200048A (especially paragraphs 0026 and 0036 to 0038) respectively describe the technique in which a film made of, e.g., a copper and manganese compound is formed in a recess of an interlayer insulation film, an oxide film formed on the surface of the metal wiring is not examined.
Note that, depending on the number valence of Mn, there are plural kinds of manganese oxides such as MnO, Mn3O4, Mn2O3, MnO2, etc. Herein, these manganese oxides are collectively referred to as MnOx (x: given positive number).